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Experience

Internship and industry experience in digital IC verification.

Experience entries

  1. Digital IC Verification Engineer Intern · Enrigin Technology

    AXI Address Mapping & Hash Routing Module Verification

    Feb 2025 – Aug 2025 Shanghai, China
    • Authored test plans for Address Mapping, Hash Routing, Burst Clipping; resolved SoC spec gaps via design review.
    • Built macro/plusarg-driven UVM env on AXI VIP for cross-IP and multi-instance reuse.
    • Owned ID Remap/Reorder verification after AXI ID width 9→12-bit extension; covered all-identical/all-unique/random-outstanding ID scenarios; root-caused a CAM aliasing corner case.
    • Built scoreboard with bit-accurate reference models for NUMA hash routing and 512B boundary clipping (AxSize=0..7, unaligned addresses, narrow transfers); hit 100% code + functional coverage for module signoff.

More entries to come.