Projects
Four digital-IC projects spanning verification, RTL design, physical design, and AI accelerators.
NPU Design & Verification — CNN Inference Accelerator
UVM env built, coverage closed, CDC signed offFeb 2026 – present · Team-developed; personal ownership: functional verification
22 nm CNN inference NPU — owned the verification side: UVM environment, bit-true scoreboard, coverage closure, CDC sign-off.
- Verif
- AI
- RTL
- NPU
AXI Address Mapping & Hash Routing UVM Verification
tape-out signoffFeb 2025 – Aug 2025 · Digital IC Verification Engineer Intern, Enrigin Technology (Shanghai)
Industrial UVM internship — parameterized AXI verification, ID Remap/Reorder, 100% coverage signoff.
- Verif
- UVM
- AXI
- SoC