2026
- 10.26 从评测到agent：NVIDIA用大模型做RTL设计与验证的14篇论文 AI Generated AI for EDA
- 10.17 【计组】超标量与乱序执行（下）-ROB、提交与分支恢复 Rewritten Computer Architecture
- 10.16 【计组】超标量与乱序执行（上）-超标量、寄存器重命名与Reservation Station Rewritten Computer Architecture
- 10.15 【计组】Cache性能优化 AI Assisted Computer Architecture Cache
- 10.14 芯片设计与验证岗位需要什么AI能力：从Anthropic的两份JD说起 AI Generated Industry AI for EDA
- 10.12 中国芯片行业 2027—2030 年发展趋势：需求、供给与中美产业比较 AI Generated Industry
- 10.11 低功耗设计 AI Assisted Low Power
- 09.16 时钟电路 Rewritten Clock
- 07.08 形式验证 AI Assisted Formal
- 05.17 Verilog / SystemVerilog 状态机 Verilog SystemVerilog
- 05.04 同步 FIFO：空满标志 Verilog
- 04.24 静态冒险与毛刺 Digital Logic
- 04.21 Verilog 可综合性 Verilog Synthesis
- 04.07 VLSI 符号速查 VLSI
2025
2024
- 09.13 【计组】Cache（下）-读写策略、替换算法与一致性问题 AI Assisted Computer Architecture Cache
- 09.12 【计组】Cache（上）-工作原理与映射方式 AI Assisted Computer Architecture Cache
- 08.26 阿姆达尔、登纳德缩放与摩尔定律 AI Generated Computer Architecture Low Power
- 05.04 测试平台架构与 interface SystemVerilog
- 05.03 SystemVerilog 激励时序：解决竞争冒险 SystemVerilog
- 03.30 Verilog 异步复位、同步释放 Verilog
- 03.26 Verilog 练习：五个小项目 Verilog Exercises
2023
AI for EDA
AMBA
Cache
Clock
Computer Architecture
- 2026 【计组】超标量与乱序执行（下）-ROB、提交与分支恢复 Rewritten Computer Architecture
- 2026 【计组】超标量与乱序执行（上）-超标量、寄存器重命名与Reservation Station Rewritten Computer Architecture
- 2026 【计组】Cache性能优化 AI Assisted Computer Architecture Cache
- 2025 计算机体系结构基础 Computer Architecture
- 2025 【计组】RISC与CISC AI Assisted Computer Architecture
- 2024 【计组】Cache（下）-读写策略、替换算法与一致性问题 AI Assisted Computer Architecture Cache
- 2024 【计组】Cache（上）-工作原理与映射方式 AI Assisted Computer Architecture Cache
- 2024 阿姆达尔、登纳德缩放与摩尔定律 AI Generated Computer Architecture Low Power
Digital Logic
Exercises
Formal
Industry
Low Power
Synthesis
SystemVerilog
UVM
Verilog
- 2026 Verilog / SystemVerilog 状态机 Verilog SystemVerilog
- 2026 同步 FIFO：空满标志 Verilog
- 2026 Verilog 可综合性 Verilog Synthesis
- 2024 Verilog 异步复位、同步释放 Verilog
- 2024 Verilog 练习：五个小项目 Verilog Exercises
- 2026 Verilog 语法速览 Rewritten Verilog
- 2024 Verilog 系统任务和编译预处理语句 Verilog
- 2024 Verilog 基础：语法、运算符与语句 Verilog
- 2024 Verilog 概述及建模 Verilog